Computers are routinely used to receive and process data from peripheral devices such as digital cameras and digital video recorders. The peripheral devices typically transfer data to a computer via a serial bus. Viewing images captured by these peripheral devices in real-time, for example, requires the peripheral device to transfer a relatively large amount of data to the computer in a relatively short amount of time. In the past, computers used a Universal Serial Bus (“USB”) to transfer such data, but a USB cannot guarantee real-time viewing of digital transmissions due to its inherent limitations. Thus, the IEEE 1394 standard was developed to allow simple, low-cost, high-bandwidth, real-time data interfacing between computers and peripherals without significant signal degradation.
IEEE 1394 is a nonproprietary, high-speed, serial bus input/output standard. It provides a comprehensive standard for connecting digital devices, including personal computers and consumer electronics hardware. It is also platform-independent, scalable (expandable), and flexible in supporting peer-to-peer (roughly, device-to-device) connections. IEEE 1394 preserves data integrity by eliminating the need to convert digital signals into analog signals. Created for desktop networks by Apple Computer, which called the technology FIREWIRE™, and further developed by the IEEE 1394 working group, it is considered a low-cost interface for devices such as digital cameras, camcorders, and multimedia devices. In addition, it is seen as a means of integrating personal computers and home electronics equipment.
FIG. 1 illustrates peer-to-peer connections according to the IEEE 1394 standard. A computer 102 in a room 104 of a structure 100 is communicatively coupled to a computer 106 in a room 108 of the structure 100 via a serial bus 105. Another serial bus 109 is used to communicatively couple the computer 106 to another computer 110 in another room 112. Each computer on the network includes networking components that implement IEEE 1394.
FIG. 2 illustrates the IEEE 1394 networking components 200 that include a physical layer chip (“PHY”) 202 and a link layer chip (“LiNK”) 204. The LINK chip 204 contains the networking intelligence to process and generate networking signals, such as arbitration signals and packets. The PHY chip 202 is the physical interface by which the computer system may receive or send networking information to and from the serial bus along a plurality of signal lines 2181-21814. The PHY chip 202 also serializes the data from the LINK chip 204 if the data is to be sent out to the serial bus 220, and likewise deserializes the data from the cable to be sent to the LINK chip 204 in parallel format. There are typically at least fourteen wires that communicatively couple the PHY chip 202 to the LINK chip 204.
IEEE 1394 specifies that all devices connected to a serial bus have the same reference ground potential as provided by the ground wire of the serial bus. IEEE 1394 recognizes, however, that separate devices connected to the bus may have different ground potentials. Such voltage differences could result in direct current flowing from the device having the higher ground potential to the device having the lower ground potential. Not only could such a current flow cause signal degradation, but it could cause damage to circuitry within the device as well. Thus, IEEE 1394 recommends that the ground wire of the serial bus be electrically isolated from the rest of the networking components in order that all PHY chips connected to a serial bus operate on the same isolated ground domain.
FIG. 2 illustrates the recommended arrangement for electrical isolation of the PHY 202 and LINK 204 networking components. The ground 216 of the LINK chip 204 is coupled to the computer's chassis (not shown) as a reference. The ground 212 of the PHY chip is coupled to the ground 213 of the serial bus 220. A parallel configuration of a capacitor 208 and a resistor 206 effectively isolate the ground 213 of the serial bus 220 from the ground 216 of the LINK chip 204. The PHY and LINK chips are communicatively coupled by capacitors 2141-14.
This approach works well, but it is incompatible with the trend to reduce the size of electronic devices. Two major reasons account for the desire to decrease the size, shape, and configuration of electronic devices. First, smaller footprint circuitry allows a reduction in the trace lines that go from any pin on an integrated circuit package to the pad on a die, helping to increase signal integrity. Second, smaller components occupy less space on a printed circuit board, thus allowing more room for other useful components on the same printed circuit board. Hence, the solution offered by IEEE 1394 using an external capacitor and resistor to electrically isolate the PHY and LINK chips creates unnecessary bulkiness through use of additional electronic components. And while combined PHY-LINK chips are commercially available, such chips operate on the same ground potential and thus are unsuitable for distributed systems where differences in ground potential may exist. Thus, there is a need for structures for connecting digital devices while isolating them from undesired direct current while also conforming with the trend toward miniaturization of electronic devices.